Power-Efficient Hardware-Software DesignWare IoT Platform Accelerates Development of System-on-Chips for IoT Applications
Platform includes pre-verified sensor and control IP subsystem with ARC EM5D processor as well as logic libraries, memory compilers, NVM, MIPI, USB and ADC
Thick-oxide logic libraries and low voltage memories minimize leakage current
Hardware accelerators and bus-less processor architecture reduces area and cycle count for always-on functions such as sensor fusion and voice recognition
embARC Open Software Platform provides online access to free and open source drivers, operating systems and middleware for software developers implementing ARC processor-based designs
Synopsys, Inc. (Nasdaq:SNPS) today announced a collaboration with TSMC to develop an integrated Internet of Things (IoT) platform on TSMC's 40-nm ultra-low-power (ULP) process technology. The IoT platform incorporates a broad range of DesignWare® IP, including an integrated sensor and control IP subsystem with the ultra-low-power ARC® EM5D processor core, power-and area-optimized logic libraries, memory compilers, NVM, MIPI and USB interfaces as well as an analog-to-digital converter (ADC). The high-performance, low-power IoT platform provides designers with a pre-validated solution that enables them to deliver the energy-efficient, always-on processing required for applications such as sensor fusion and voice recognition.
The ability to capture information from multiple sensors, perform something "smart" with that information and relay these results to the cloud is driving IoT application innovation, particularly in the wearable and machine-to-machine markets. Synopsys provides a comprehensive portfolio of DesignWare IP that meets the specific requirements of IoT system-on-chip (SoC) designs including:
Pre-validated hardware and software sensor and control IP subsystem that delivers significant area and power savings with lower system-level latency. The subsystem provides orders of magnitude reduction in cycle count because of a bus-less architecture and area-efficient hardware accelerators.
Power-efficient ARC EM5D processor core featuring a comprehensive set of RISC and DSP instructions and customizable hardware extensions
Area-optimized interface IP, including silicon-proven USB with battery-charging and power-down features
Power optimization kits and ultra-high density logic libraries with multi-bit flip-flops minimize power and area, while compatible thick oxide libraries deliver low leakage for always-on functions
High-density, low voltage memory compilers incorporate the smallest TSMC bit cells with integrated test and repair supporting embedded flash
Synopsys embARC Open Software Platform gives ARC software developers online access to a comprehensive suite of free and open-source software that eases the development of code for the IoT and other embedded applications. embARC includes commonly used components for the IoT, such as MQTT and CoAP internet protocols as well as FreeRTOS and Contiki OS operating systems.
"TSMC's long collaboration with Synopsys has enabled us to provide our mutual customers with access to a broad portfolio of high-quality IP on a broad range of TSMC process technologies for their target applications," said TSMC Senior Director, Design Infrastructure Marketing Division, Suk Lee. "This IoT platform will help designers take advantage of TSMC's 40-nm ULP process and quickly ramp into volume production for the rapidly expanding IoT market."
"Synopsys has optimized a broad portfolio of IP for TSMC's 40-nm ultra-low-power process targeting energy-efficient IoT designs," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "By collaborating with TSMC on the IoT platform we've enabled designers to meet aggressive power and cost goals, while accelerating their project schedules in this fast-moving market."
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